Video processors typically require large amounts of memory to temporarily store video data during operations. With reference to FIG. 1, a video processor 10 is illustrated having a video input 12 to an input circuit 22 and a modified video output 14 from an output circuit 24. A video processor engine 30 performs the majority of the processing of the video data. The video processor engine may have a different function depending on the desired modified video output. For instance, the video processor engine 30 may perform a compression function, an encryption function, a motion estimation function, or a pattern recognition function. In other embodiments the video processor 10 may include multiple video processor engines 30 each of which performs a different function. Regardless of the particular type of video processor engine 30 that is present in the video processor 10, the necessity for a large amount of memory is universal in any video processor 10.
Memory in a video processor is typically one of two main types. The main memory is standard Random Access Memory that is used for general data storage, oftentimes in multiple portions of a video processor as needed. The other memory type is an input line buffer memory, which is used to convert video data streamed in raster format to blocks of video commonly called macroblocks. Typically these input line buffer memories are double-buffer memories and they store multiple lines of video data at a time. This process is explained with reference to FIG. 2.
In FIG. 2 the memory includes two separate line buffer memories, a first line buffer memory 40 and a second line buffer memory 42. Each of the line buffer memories 40, 42 includes, in this example, 8 lines of storage or forty-eight storage locations where each storage location stores 8 pieces, or pixels, of data, which corresponds to an 8×8 block size. Line buffer memories are typically sized based on the block size of the video system, and can be any size. 16×16 sized blocks are very common as well. In FIG. 2 the storage locations are numbered 0-47 for each of the line buffer memories 40, 42.
Video data is initially stored in the first line buffer memory 40. Video data is sent to the line buffer memory in “raster scan” order, which means data begins in location 0 with data A0-A7, then fills location 1 with B0-B7, then fills location 2 with C0-C7, etc., until the first line buffer memory 40 is completely full by writing F56-F63 in location 47. Although data is written to the first line buffer memory 40 in scan order, it is typically read in “block” or “macroblock” order, because most video processing is performed on groups, or blocks, of data. As described above, block can be any size, but are shown as 8×8 in this example.
To read block “A,” the data A0-A7 is read from location 0, data A8-A15 is read from location 6, data A16-A23 is read from location 12, data A24-A31 is read from location 18, data A32-A39 is read from location 24, data A40-A47 is read from location 30, data A48-A55 is read from location 36, and data A56-A63 is read from location 42, as illustrated in FIG. 2.
In double buffering systems, as first line buffer memory 40 is being emptied, the second line buffer memory 42 is being filled with a next set of video data. Otherwise, if there were only one line buffer memory, the video processor 10 would have to wait until the first line buffer memory 40 was nearly empty before it could begin to write the raster scan data into the top row of the line buffer memory. For instance, it is impossible to write data in the position 2 of the first line buffer memory 40 until the third block (block C in the illustrated example) has been read. Using a double buffering system, as illustrated in FIG. 2, allows the video data to be written to one of the line buffer memories at the same rate as it is read from the other line buffer memories because the system does not have to wait until the first line buffer memory is nearly empty before writing a next set of data to the second line buffer memory. Instead, the video system can immediately begin writing data to the second line buffer memory 42 as the first line buffer memory 40 is being read. When the first line buffer memory 40 is completely empty, data is then read from the second line buffer memory 42, which is now full, and the cycle repeats by writing data again to the first line buffer memory 40.
In the example of FIG. 2, a first block, block “A,” has been read from the first line buffer memory 40 as illustrated by the reference 41 of FIG. 2. Because eight of the 48 locations have been read from the first line buffer memory 40, likewise eight of the 48 locations have been written to in the second line buffer memory 42. As described above, as data is read from one of the line buffer memories 40, 42 in the double buffering system, data is written into the other of the buffers. Note that the blocks are read in block order but written in scan order.
Modern video systems include large line buffer memories to temporarily store lines of video data as they are sent to the video processor in raster order. Because each frame of a progressive scan 1080p HD video has a width of 1920 pixels, each of the line buffer memories in a double buffering system has a width of 1920 storage locations and a depth equal to the number of rows in a standard block. In the H.264 standard, standard macroblocks are 16×16, thus any double buffer system would include two copies of a 16×1920 memory.
Embodiments of the invention address these and other limitations in the prior art.